The bit transmission layer or physical layer (PHY) is the bottom layer in the O[pen]S[ystems]I[nterconnection] layer model, also called OSI reference model and denotes a layer model of the International Standards Organisation (ISO) which in turn serves as a design basis for communication protocols in computer networks.
The physical layer (PHY) is responsible for Combining, F[orward]E[rror]C[orrection], modulation, power control, spreading (C[ode]D[ivision]M[ultiple]A[ccess]) and the like and knows neither data nor applications, only zeros and ones. PHY makes logical channels (transport channels for U[niversal]M[obile]T[elecommunications]S[ystem]) available to the security layer (D[ata]L[ink]L[ayer]) above it, in particular to a partial layer called M[edia]A[ccess]C[ontrol] Layer.
In principle D-PHY provides a flexible, low-cost and quick serial interface for communication links between components within a mobile device.
As illustrated in FIG. 5A, in modern mobile phones a data source, for example an application processor, provides image data as D-PHY signals to the M[obile]I[ndustry]P[rocessor]I[nterface]-D[isplay]S[erial]I[nterface] for display on a connected data sink, for example on a connected display. Also, a data sink such as an application processor, can receive, via a MIPI-C[amera]S[erial]I[nterface], image data in D-PHY format from a connected data source, such as from a connected camera.
A DSI or DSI-2 or CSI or CSI-2 or CSI-3 based on the D-PHY protocol comprises up to four differential data lines and a differential clock line, which electrically connect the application processor by means of a copper cable with the display and/or with the camera. The data rate per differential data line is up to 1.5 Gbps (Gigabit per second).
This conventional sending and receiving of the D-PHY-DSI signals or the D-PHY-CSI signals via one to four differential data signals and a differential clock line is illustrated by way of example in the D-PHY interface configuration of FIG. 5B by way of two bidirectional data channels (=so called data lanes CH0+, CH0− and CH1+, CH1−) and a clock line (=so called clock lane CLK+, CLK−) between the modules of the master side (=data source, for example camera and/or application processor) and the modules of the slave side (=data sink, for example application processor and/or display unit). In the bidirectional multiple data lane configuration the abbreviation PPI in FIG. 5B stands for PHY Protocol Interface.
In this context, as can be seen in FIG. 5A, up to ten copper lines are required for data transmission for each connected display or for each connected camera (for example four times two data lines and one time two clock lines). Correspondingly high-resolution screens, television sets or cameras for example comprise an electrical M[obile]I[ndustry]P[rocessor]I[nterface]-D-PHY-data transmission interface.
This interface is used to transmit both H[igh]S[peed] data and L[ow]P[ower] data, wherein the data rate of the LP data is typically very much less than die data rate of the HS data. This is shown by way of FIG. 4, in which the respective voltage levels are shown for HS data transmission and for LP data transmission.
In this context the guidelines of the M[obile]I[ndustry]P[rocessor]l[nterface] D-PHY standard are mandatory for the transmission of H[igh]S[peed]−/L[ow]P[ower] data. L[ow]P[ower] data must obey a MIPI-specific protocol, which does not permit to transmit already established industry standards for the transmission of serial data with a small bandwidth, such as for example I2C (=Inter-Integrated Circuit), S[erial]P[eripheral]I[nterface] or other protocols, for although the last mentioned protocols have a need for the transmission of D-PHY-H[igh]S[peed] data, they in addition also require the transmission of further binary data which are not PHY-conform.
In particular the relevant MIPI standard permits albeit the transmission of L[ow]P[ower] data bidirectionally, but not bidirectionally at the same time, i.e. not full duplex (=duplex transmission), but only half duplex (=alternating transmission).
Therefore, if apart from L[ow]P[ower] data conforming to MIPI-D-PHY serial data is to be transmitted in addition which does not conform to the MIPI-Standard, even conveniently in full duplex (=duplex transmission), two or three separate electrical lines must for example be provided in known D-PHY systems for conveying the L[ow]P[ower] data not conforming to MIPI-D-PHY.
In some applications this may lead to geometric problems or space problems when the cables are run; such as in the following applications:                mobile phones with small links or        endoscopes which in view of their intended purpose should by nature have a minimal diameter throughout.        
Such separate lines also lead to problems, because their normally unipolar data lines irradiate electromagnetic energy.